Netac Technology, a specialist in NAND flash storage devices, has received its first samples of DDR5 memory chips and begun to work on DDR5-10000 RAM modules, it said this week. Given all the performance enhancements that DDR5 has, it should be doable to hit a 10,000 MT/s data transfer speed in a lab. But will initial DDR5 controllers and PHYs support it?
Making DRAMs rated for DDR5-6400 operate as DDR5-10000 is an impressive achievement. Meanwhile, SK Hynix demonstrated DDR5-8400 operation long before the standard was even formally introduced last year, a testament to the new type of DRAM’s affinity toward high data transfer rates.
For its development work, Netac uses Micron’s DDR5 engineering samples marked as IFA45 Z9ZSB ZN5J, according to IT Home. Micron’s FBGA markings decoder confirms existence of this DDR5 chip and reveals its official part number — MT60B2G8HB-48B — that leads us to its general specifications: an up to 6400 MT/s data transfer rate, as well as a 16Gb capacity. In fact, this is already listed by some of Micron’s distribution partners.
Netac Technology may not be a household name for many, but the memory specialist holds over 300 patents granted in the U.S., South Korea, Singapore and China. The firm once claimed that it had invented USB flash drives and even sued multiple companies, including Lenovo and PNY, for infringing its patents. By now, Netac has refocused to actual products, so it has a fairly broad portfolio of NAND flash-based storage devices and some memory modules too.
With DDR4, Netac’s highest achievement were DDR4-3600 modules with CAS latency timings of 18-22-22-42 at 1.35V.
The DDR5 architecture supports many methods to enable I/O scalability on the best RAM for years to come, including DFE (decision feedback equalizer), on-die termination and improved training modes. DDR5 chips also feature on-die single error correction (SEC) ECC to improve yields and support high clocks, and DDR5 modules feature two separate channels to boost efficiency and make it slightly easier for controllers to use them at high speeds. Finally, DDR5 modules may be equipped with their own PMIC and VRMs, which could enable makers of enthusiast-grade memory DIMMs to significantly improve performance of DRAMs.
But there’s a catch. SK Hynix, just like other memory makers, achieved its record data transfer speed in a lab using either a standalone DDR5 memory controller and PHY, or an FPGA implementation of such a controller that sat next to DDR5 memory chips on the same PCB. Real-world DDR5 controllers and PHY may be implemented differently. Moreover, they are integrated into complex SoCs, such as Intel’s Alder Lake-S, that introduce limitations like thermals and noises.
Furthermore, in real desktop systems, memory chips sit on modules and are not connected directly to the PHY. So, while we know that in ideal conditions a DDR5 memory IC and a DDR5 PHY/controller can work fine at 8400 MT/s and demonstrate excellent signal integrity, in real-world conditions things may work differently. In fact, even if the modules can hit very high data rates in the lab, it remains to be seen whether they’ll hit the same speed with a real, consumer CPU and conventional cooling system.