Computers

Intel Tapes In 7nm Meteor Lake Compute Tile


Intel CEO Pat Gelsinger announced at the J.P. Morgan Global TMC Week event today that the company has “taped-in” the compute tiles for its new 7nm Meteor Lake chips, meaning that the design elements and IP have been validated for integration into the broader SoC. The design will be ready for “tape-out” after further SoC validation, which is when it will be readied to be sent to the foundry for production.

Gelsinger’s comments came in the context of the company’s ongoing work with its 7nm process node. “We’ve got past some of the stumbles at 10 and now 7, and the daily updates that we’re getting on wafers coming out of fab, the full embrace of EUV, we’re very confident that we have that back on track. In fact, right now, we’re taping out the compute tile, the Meteor Lake compute tile, is finishing tape-in as we speak,” Gelsinger said. 




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