We now know a lot more about AMD’s forthcoming 3D die stacking technology, thanks to new tweets from reliable hardware leakers ExecutableFix and Patrick Schur. These tweets claim that we can first expect to see this tech at play in the EPYC Milan-X series of data center processors.
Milan-X aka Milan-X(3D). Genesis IO-die with stacked chipletsI love lasagna 😋 https://t.co/O2FrGxyd8PMay 25, 2021
AMD is working on a new CPU (codename Milan-X) that will use stacked dies. 😏May 25, 2021
A year ago, AMD revealed via its Financial Analyst Day 2020 event that the chipmaker was working on a new breed of processors that would utilize its X3D chip packaging technology. AMD’s X3D hybrid technology is based on 2.5D packaging and 3D stacking. In layman terms, it allows AMD to stack various dies on top of each other inside the chipmaker’s multi-chip modules (MCM). Considering the similarity, X3D is basically AMD’s response to Intel’s Foveros 3D stacking technology.
The latest rumors claim that Milan-X will be the first wave of chips to feature X3D chip packaging. Given the codename, it’s reasonable to assume that Milan-X is comprised of Zen 3 cores, just like the EPYC 7003 (Milan) parts. ExecutableFix claims that Milan-X is based on the Genesis IO-die, alluding to the same I/O die inside Zen 3 EPYC chips.
However, we don’t expect AMD to push the core barrier with Milan-X. At its presentation, the company explained that the objective behind X3D was to provide up to 10X higher bandwidth. However, the company never revealed what it planned to stack. ExecutableFix thinks that AMD is stacking chiplets, but core complex dies (CCDs) seem unlikely, given the cooling that they require.
Therefore, AMD is very likely stacking memory on Milan-X as opposed to compute dies. Furthermore, the diagram that was shared at AMD’s Financial Analyst Day 2020 exhibited a 2×2 layout with four interconnected chiplets and four stacked dies above a huge interposer. The four chiplets are probably the compute dies, and we suspect that AMD’s stacking HBM packages on Milan-X. Apparently, there’s one stacked die per each individual chiplet. The presence of HBM memory would do wonders on an EPYC processor, especially in a data center environment that’s heavy on workloads that are sensitive to bandwidth.
Even on AMD’s roadmap, the X3D processor was marked as “future.” We haven’t heard anything about Milan-X until today. However, AMD President and CEO Dr. Lisa Su is scheduled to deliver the a keynote at Computex 2021 called “AMD Accelerating – The High Performance Computing Ecosystem” so we may hear some more about Milan-X very soon.